1. Field of the Invention
This invention relates to a method for manufacturing integrated circuits and, more specifically to a method for retaining the integrity of a photoresist pattern during the manufacture of semiconductor integrated circuits.
2. Related Art
In the manufacture of semiconductor integrated circuits, a variety of photolithographic steps are employed. These photolithographic steps encompass forming a layer of photosensitive material, photoresist, overlying a surface of a semiconductor wafer or substrate and defining a pattern therein. Typically, the pattern formed is used to mask portions of an underlying layer to allow unmasked portions of the underlying layer to be removed. The removal of the material of such underlying layers is often performed using a plasma etching process, for example a reactive ion etch process. While in some etch processes the photoresist layer maintains its integrity, that is little or no photoresist is removed and the cross-sectional profile of the resist remains essentially unchanged, in other etch processes the photoresist is removed at a rate comparable to the removal rate of the underlying layer. This loss of integrity is known to affect the patterning of the underlying layer. For example, in some cases the desired feature sizes, as defined by the original photoresist pattern, are not reproduced. In some embodiments portions of the desired features are missing and in some cases both feature size and presence are affected.
Various attempts have been made to improve photoresist integrity during semiconductor processing. For example, it is generally known that baking the photoresist layer, often referred to as a hard bake, after the pattern is formed and immediately prior to a plasma etch improves integrity. In addition, it is known that a blanket exposure of the patterned photoresist with an ultraviolet (UV) light improves photoresist integrity. It is also known to use both a hard bake and UV exposure in combination to improve photoresist integrity. However, such independent or combined use of bakes and blanket UV exposure are at best marginally acceptable for some necessary etch processes, for example some metal etch processes.
Therefore it would be desirable for there to be a process for forming a patterned photoresist layer with improved integrity for use in some etch processes. It would also be desirable for this process to be readily integrated into standard semiconductor processing.